Energy consumption in reconfigurable mpsoc architecture: Two-level caches optimization oriented approach

A. Bengueddach, B. Senouci, S. Niar, B. Beldjilali. Energy consumption in reconfigurable mpsoc architecture: Two-level caches optimization oriented approach. In 8th International Design and Test Symposium, IDT 2013, Marrakesh, Morocco, 16-18 December, 2013. pages 1-6, IEEE, 2013. [doi]

@inproceedings{BengueddachSNB13-0,
  title = {Energy consumption in reconfigurable mpsoc architecture: Two-level caches optimization oriented approach},
  author = {A. Bengueddach and B. Senouci and S. Niar and B. Beldjilali},
  year = {2013},
  doi = {10.1109/IDT.2013.6727118},
  url = {http://dx.doi.org/10.1109/IDT.2013.6727118},
  researchr = {https://researchr.org/publication/BengueddachSNB13-0},
  cites = {0},
  citedby = {0},
  pages = {1-6},
  booktitle = {8th International Design and Test Symposium, IDT 2013, Marrakesh, Morocco, 16-18 December, 2013},
  publisher = {IEEE},
}