Mladen Berekovic, Frank Bouwens, Tom Vander Aa, Diederik Verkest. Interconnect Power Analysis for a Coarse-Grained Reconfigurable Array Processor. In Lars Svensson, José Monteiro, editors, Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation, 18th International Workshop, PATMOS 2008, Lisbon, Portugal, September 10-12, 2008. Revised Selected Papers. Volume 5349 of Lecture Notes in Computer Science, pages 449-457, Springer, 2008. [doi]
No references recorded for this publication.
No citations of this publication recorded.