Physical verification flow for hierarchical analog ic design constraints

Volker Meyer zu Bexten, Markus Tristl, Göran Jerke, Hartmut Marquardt, Dina Medhat. Physical verification flow for hierarchical analog ic design constraints. In The 20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015, Chiba, Japan, January 19-22, 2015. pages 447-453, IEEE, 2015. [doi]

References

No references recorded for this publication.

Cited by

No citations of this publication recorded.