Area efficient binary tree layout

Sourav Bhattacharya, Wei-Tek Tsai. Area efficient binary tree layout. In First Great Lakes Symposium on VLSI, 1991, Kalamazoo, MI, USA, March 1-2, 1991. pages 18-24, IEEE, 1991. [doi]

@inproceedings{BhattacharyaT91-0,
  title = {Area efficient binary tree layout},
  author = {Sourav Bhattacharya and Wei-Tek Tsai},
  year = {1991},
  doi = {10.1109/GLSV.1991.143936},
  url = {http://dx.doi.org/10.1109/GLSV.1991.143936},
  researchr = {https://researchr.org/publication/BhattacharyaT91-0},
  cites = {0},
  citedby = {0},
  pages = {18-24},
  booktitle = {First Great Lakes Symposium on VLSI, 1991, Kalamazoo, MI, USA, March 1-2, 1991},
  publisher = {IEEE},
  isbn = {0-8186-2170-2},
}