ASET: A Formal Model for System Emulation and Verification

Swapan Bhattacharyya, Joydeep Bhattacharyya, Adrish Ray Chaudhuri. ASET: A Formal Model for System Emulation and Verification. In 15th IEEE International Workshop on Rapid System Prototyping (RSP 2004), 28-30 June 2004, Geneva, Switzerland. pages 21-28, IEEE Computer Society, 2004. [doi]

@inproceedings{BhattacharyyaBC04,
  title = {ASET: A Formal Model for System Emulation and Verification},
  author = {Swapan Bhattacharyya and Joydeep Bhattacharyya and Adrish Ray Chaudhuri},
  year = {2004},
  doi = {10.1109/RSP.2004.11},
  url = {http://doi.ieeecomputersociety.org/10.1109/RSP.2004.11},
  researchr = {https://researchr.org/publication/BhattacharyyaBC04},
  cites = {0},
  citedby = {0},
  pages = {21-28},
  booktitle = {15th IEEE International Workshop on Rapid System Prototyping (RSP 2004), 28-30 June 2004, Geneva, Switzerland},
  publisher = {IEEE Computer Society},
  isbn = {0-7695-2159-2},
}