Design of an FPGA Hardware Optimizing the Performance and Power Consumption of a Plenoptic Camera Depth Estimation Algorithm

Faraz Bhatti, Thomas Greiner. Design of an FPGA Hardware Optimizing the Performance and Power Consumption of a Plenoptic Camera Depth Estimation Algorithm. Algorithms, 14(7):215, 2021. [doi]

@article{BhattiG21-0,
  title = {Design of an FPGA Hardware Optimizing the Performance and Power Consumption of a Plenoptic Camera Depth Estimation Algorithm},
  author = {Faraz Bhatti and Thomas Greiner},
  year = {2021},
  doi = {10.3390/a14070215},
  url = {https://doi.org/10.3390/a14070215},
  researchr = {https://researchr.org/publication/BhattiG21-0},
  cites = {0},
  citedby = {0},
  journal = {Algorithms},
  volume = {14},
  number = {7},
  pages = {215},
}