Design and Exploration of Negative Capacitance FETs for Energy Efficient SRAM based In-Memory XNOR/Input and Weight Product Operation for Deep Neural Networks

Venu Birudu, Siva Sankar Yellampalli, Ramesh Vaddi. Design and Exploration of Negative Capacitance FETs for Energy Efficient SRAM based In-Memory XNOR/Input and Weight Product Operation for Deep Neural Networks. In IEEE International Symposium on Smart Electronic Systems, iSES 2022, Warangal, India, December 18-22, 2022. pages 321-325, IEEE, 2022. [doi]

@inproceedings{BiruduYV22,
  title = {Design and Exploration of Negative Capacitance FETs for Energy Efficient SRAM based In-Memory XNOR/Input and Weight Product Operation for Deep Neural Networks},
  author = {Venu Birudu and Siva Sankar Yellampalli and Ramesh Vaddi},
  year = {2022},
  doi = {10.1109/iSES54909.2022.00072},
  url = {https://doi.org/10.1109/iSES54909.2022.00072},
  researchr = {https://researchr.org/publication/BiruduYV22},
  cites = {0},
  citedby = {0},
  pages = {321-325},
  booktitle = {IEEE International Symposium on Smart Electronic Systems, iSES 2022, Warangal, India, December 18-22, 2022},
  publisher = {IEEE},
  isbn = {979-8-3503-9922-6},
}