Per Bjesse, Arne Borälv. DAG-aware circuit compression for formal verification. In 2004 International Conference on Computer-Aided Design (ICCAD 04), November 7-11, 2004, San Jose, CA, USA. pages 42-49, IEEE Computer Society / ACM, 2004. [doi]
@inproceedings{BjesseB04,
title = {DAG-aware circuit compression for formal verification},
author = {Per Bjesse and Arne Borälv},
year = {2004},
doi = {10.1145/1112239.1112253},
url = {http://doi.acm.org/10.1145/1112239.1112253},
tags = {context-aware},
researchr = {https://researchr.org/publication/BjesseB04},
cites = {0},
citedby = {0},
pages = {42-49},
booktitle = {2004 International Conference on Computer-Aided Design (ICCAD 04), November 7-11, 2004, San Jose, CA, USA},
publisher = {IEEE Computer Society / ACM},
isbn = {0-7803-8702-3},
}