A memetic algorithm for computing 3D capacitance in multiconductor VLSI circuits

Yiorgos I. Bontzios, Michael G. Dimopoulos, Alkis A. Hatzopoulos. A memetic algorithm for computing 3D capacitance in multiconductor VLSI circuits. In Rolf Kraemer, Adam Pawlak, Andreas Steininger, Mario Schölzel, Jaan Raik, Heinrich Theodor Vierhaus, editors, 14th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2011, Cottbus, Germany, April 13-15, 2011. pages 341-346, IEEE, 2011. [doi]

@inproceedings{BontziosDH11-2,
  title = {A memetic algorithm for computing 3D capacitance in multiconductor VLSI circuits},
  author = {Yiorgos I. Bontzios and Michael G. Dimopoulos and Alkis A. Hatzopoulos},
  year = {2011},
  doi = {10.1109/DDECS.2011.5783108},
  url = {http://dx.doi.org/10.1109/DDECS.2011.5783108},
  researchr = {https://researchr.org/publication/BontziosDH11-2},
  cites = {0},
  citedby = {0},
  pages = {341-346},
  booktitle = {14th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2011, Cottbus, Germany, April 13-15, 2011},
  editor = {Rolf Kraemer and Adam Pawlak and Andreas Steininger and Mario Schölzel and Jaan Raik and Heinrich Theodor Vierhaus},
  publisher = {IEEE},
  isbn = {978-1-4244-9755-3},
}