A floorplanning-Synthesis Methodology for Multiple Chip Module Design

Nikolaos G. Bourbakis, Mohammad Mortazavi. A floorplanning-Synthesis Methodology for Multiple Chip Module Design. Transactions of the SDPS, 4(1):67-81, 2000. [doi]

@article{BourbakisM00,
  title = {A floorplanning-Synthesis Methodology for Multiple Chip Module Design},
  author = {Nikolaos G. Bourbakis and Mohammad Mortazavi},
  year = {2000},
  url = {http://iospress.metapress.com/content/12a0egc4epgh1vex/},
  researchr = {https://researchr.org/publication/BourbakisM00},
  cites = {0},
  citedby = {0},
  journal = {Transactions of the SDPS},
  volume = {4},
  number = {1},
  pages = {67-81},
}