Implementation of a pulse-holding Time-to-Digital Converter on an FPGA

Francesco Brandonisio, Alberto Prodomo, Michael Peter Kennedy, Ettore Napoli. Implementation of a pulse-holding Time-to-Digital Converter on an FPGA. In 21st European Conference on Circuit Theory and Design, ECCTD 2013, Dresden, Germany, September 8-12, 2013. pages 1-4, IEEE, 2013. [doi]

@inproceedings{BrandonisioPKN13,
  title = {Implementation of a pulse-holding Time-to-Digital Converter on an FPGA},
  author = {Francesco Brandonisio and Alberto Prodomo and Michael Peter Kennedy and Ettore Napoli},
  year = {2013},
  url = {http://ieeexplore.ieee.org/xpl/freeabs_all.jsp?arnumber=6662271},
  researchr = {https://researchr.org/publication/BrandonisioPKN13},
  cites = {0},
  citedby = {0},
  pages = {1-4},
  booktitle = {21st European Conference on Circuit Theory and Design, ECCTD 2013, Dresden, Germany, September 8-12, 2013},
  publisher = {IEEE},
}