Design of a pseudo-log image transform hardware accelerator in a high-level synthesis-based memory management framework

Shahzad Ahmad Butt, Stéphane Mancini, Frédéric Rousseau, Luciano Lavagno. Design of a pseudo-log image transform hardware accelerator in a high-level synthesis-based memory management framework. J. Electronic Imaging, 23(5):53012, 2014. [doi]

@article{ButtMRL14,
  title = {Design of a pseudo-log image transform hardware accelerator in a high-level synthesis-based memory management framework},
  author = {Shahzad Ahmad Butt and Stéphane Mancini and Frédéric Rousseau and Luciano Lavagno},
  year = {2014},
  doi = {10.1117/1.JEI.23.5.053012},
  url = {http://dx.doi.org/10.1117/1.JEI.23.5.053012},
  researchr = {https://researchr.org/publication/ButtMRL14},
  cites = {0},
  citedby = {0},
  journal = {J. Electronic Imaging},
  volume = {23},
  number = {5},
  pages = {53012},
}