Implementation of Parallel Processors with Wafer Scale Integration

Thomas K. Callaway, Earl E. Swartzlander Jr.. Implementation of Parallel Processors with Wafer Scale Integration. In Viktor K. Prasanna, Larry H. Canter, editors, Proceedings of the 6th International Parallel Processing Symposium, Beverly Hills, CA, USA, March 1992. pages 268-274, IEEE Computer Society, 1992.

@inproceedings{CallawayS92,
  title = {Implementation of Parallel Processors with Wafer Scale Integration},
  author = {Thomas K. Callaway and Earl E. Swartzlander Jr.},
  year = {1992},
  tags = {e-science},
  researchr = {https://researchr.org/publication/CallawayS92},
  cites = {0},
  citedby = {0},
  pages = {268-274},
  booktitle = {Proceedings of the 6th International Parallel Processing Symposium, Beverly Hills, CA, USA, March 1992},
  editor = {Viktor K. Prasanna and Larry H. Canter},
  publisher = {IEEE Computer Society},
  isbn = {0-8186-2672-0},
}