A scheme for the VLSI implementation of FIR digital filters with reduced latency - researchr publication authors

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Christos Gr. Caraiscos, Kiamal Z. Pekmestzi. A scheme for the VLSI implementation of FIR digital filters with reduced latency. In 9th European Signal Processing Conference, EUSIPCO 1998, Island of Rhodes, Greece, 8-11 September, 1998. pages 1-4, IEEE, 1998. [doi]

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