A Fault-Tolerant 176 Gbit Solid State Mass Memory Architecture

Gian-Carlo Cardarilli, Adelio Salsano, P. Marinucci, Marco Ottavi. A Fault-Tolerant 176 Gbit Solid State Mass Memory Architecture. In 15th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2000), 25-27 October 2000, Yamanashi, Japan, Proceedings. pages 173, IEEE Computer Society, 2000. [doi]

@inproceedings{CardarilliSMO00,
  title = {A Fault-Tolerant 176 Gbit Solid State Mass Memory Architecture},
  author = {Gian-Carlo Cardarilli and Adelio Salsano and P. Marinucci and Marco Ottavi},
  year = {2000},
  url = {http://computer.org/proceedings/dft/0719/07190173abs.htm},
  tags = {architecture},
  researchr = {https://researchr.org/publication/CardarilliSMO00},
  cites = {0},
  citedby = {0},
  pages = {173},
  booktitle = {15th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2000), 25-27 October 2000, Yamanashi, Japan, Proceedings},
  publisher = {IEEE Computer Society},
  isbn = {0-7695-0719-0},
}