A Verilog-A model of a charge sensitive amplifier for a HV-CMOS pixel sensor

R. Casanova, S. Grinstein. A Verilog-A model of a charge sensitive amplifier for a HV-CMOS pixel sensor. In 13th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, SMACD 2016, Lisbon, Portugal, June 27-30, 2016. pages 1-4, IEEE, 2016. [doi]

@inproceedings{CasanovaG16,
  title = {A Verilog-A model of a charge sensitive amplifier for a HV-CMOS pixel sensor},
  author = {R. Casanova and S. Grinstein},
  year = {2016},
  doi = {10.1109/SMACD.2016.7520748},
  url = {https://doi.org/10.1109/SMACD.2016.7520748},
  researchr = {https://researchr.org/publication/CasanovaG16},
  cites = {0},
  citedby = {0},
  pages = {1-4},
  booktitle = {13th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, SMACD 2016, Lisbon, Portugal, June 27-30, 2016},
  publisher = {IEEE},
  isbn = {978-1-5090-0490-4},
}