Analysis of actual fault mechanisms in CMOS logic gates

Glenn R. Case. Analysis of actual fault mechanisms in CMOS logic gates. In Donald J. Humcke, J. Michael Galey, Stephen A. Szygenda, Pat O. Pistilli, Nitta P. Dooner, Judith G. Brinsfield, J. S. Olila, editors, Proceedings of the 13th Design Automation Conference, DAC '76, San Francisco, California, USA, June 28-30, 1976. pages 265-270, ACM, 1976. [doi]

References

No references recorded for this publication.

Cited by

No citations of this publication recorded.