Hardware Transactional Memory Meets Memory Persistency

Daniel Castro, Paolo Romano 0002, João Barreto. Hardware Transactional Memory Meets Memory Persistency. In 2018 IEEE International Parallel and Distributed Processing Symposium, IPDPS 2018, Vancouver, BC, Canada, May 21-25, 2018. pages 368-377, IEEE Computer Society, 2018. [doi]

@inproceedings{Castro0B18,
  title = {Hardware Transactional Memory Meets Memory Persistency},
  author = {Daniel Castro and Paolo Romano 0002 and João Barreto},
  year = {2018},
  doi = {10.1109/IPDPS.2018.00046},
  url = {http://doi.ieeecomputersociety.org/10.1109/IPDPS.2018.00046},
  researchr = {https://researchr.org/publication/Castro0B18},
  cites = {0},
  citedby = {0},
  pages = {368-377},
  booktitle = {2018 IEEE International Parallel and Distributed Processing Symposium, IPDPS 2018, Vancouver, BC, Canada, May 21-25, 2018},
  publisher = {IEEE Computer Society},
  isbn = {978-1-5386-4368-6},
}