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Suresh Chalasani, Anujan Varma. An improved time-slot assignment algorithm for TDM hierarchical switching systems. IEEE Transactions on Communications, 41(2):312-317, 1993. [doi]
Possibly Related PublicationsThe following publications are possibly variants of this publication: Fast Parallel Time-Slot Assignment Algorithms for TDM Switching SystemsSuresh Chalasani, Anujan Varma. icpp 1990: 154-161 Parallel algorithms for time-slot assignment in TDM switching systemsSuresh Chalasani, Anujan Varma. tcom, 41(11):1736-1747, 1993. [doi] A New Parallel Algorithm for Time-Slot Assignment in Hierarchical Switching SystemsSuresh Chalasani. TC, 46(12):1387-1395, 1997.
The following publications are possibly variants of this publication: