An efficient VLSI architecture and FPGA implementation of the Finite Ridgelet Transform

Shrutisagar Chandrasekaran, Abbes Amira, Minghua Shi, Amine Bermak. An efficient VLSI architecture and FPGA implementation of the Finite Ridgelet Transform. J. Real-Time Image Processing, 3(3):183-193, 2008. [doi]

@article{ChandrasekaranASB08,
  title = {An efficient VLSI architecture and FPGA implementation of the Finite Ridgelet Transform},
  author = {Shrutisagar Chandrasekaran and Abbes Amira and Minghua Shi and Amine Bermak},
  year = {2008},
  url = {http://springerlink.metapress.com/content/w04j0jh9351659m5/},
  tags = {architecture},
  researchr = {https://researchr.org/publication/ChandrasekaranASB08},
  cites = {0},
  citedby = {0},
  journal = {J. Real-Time Image Processing},
  volume = {3},
  number = {3},
  pages = {183-193},
}