STT-MRAM for Low Power Access for Read-Intensive Parallel Deep-Learning Architectures

Saranyu Chattopadhyay, Kaustav Brahma, Arkaprova Ray, Mrigank Sharad. STT-MRAM for Low Power Access for Read-Intensive Parallel Deep-Learning Architectures. In IEEE International Symposium on Nanoelectronic and Information Systems, iNIS 2017, Bhopal, India, December 18-20, 2017. pages 61-65, IEEE, 2017. [doi]

@inproceedings{ChattopadhyayBR17-0,
  title = {STT-MRAM for Low Power Access for Read-Intensive Parallel Deep-Learning Architectures},
  author = {Saranyu Chattopadhyay and Kaustav Brahma and Arkaprova Ray and Mrigank Sharad},
  year = {2017},
  doi = {10.1109/iNIS.2017.22},
  url = {http://doi.ieeecomputersociety.org/10.1109/iNIS.2017.22},
  researchr = {https://researchr.org/publication/ChattopadhyayBR17-0},
  cites = {0},
  citedby = {0},
  pages = {61-65},
  booktitle = {IEEE International Symposium on Nanoelectronic and Information Systems, iNIS 2017, Bhopal, India, December 18-20, 2017},
  publisher = {IEEE},
  isbn = {978-1-5386-1356-6},
}