An Area-Efficient Noise-Adaptive Neural Amplifier in 130 nm CMOS Technology

Vikram Chaturvedi, Bharadwaj Amrutur. An Area-Efficient Noise-Adaptive Neural Amplifier in 130 nm CMOS Technology. IEEE J. Emerg. Sel. Topics Circuits Syst., 1(4):536-545, 2011. [doi]

@article{ChaturvediA11-0,
  title = {An Area-Efficient Noise-Adaptive Neural Amplifier in 130 nm CMOS Technology},
  author = {Vikram Chaturvedi and Bharadwaj Amrutur},
  year = {2011},
  doi = {10.1109/JETCAS.2011.2178731},
  url = {http://dx.doi.org/10.1109/JETCAS.2011.2178731},
  researchr = {https://researchr.org/publication/ChaturvediA11-0},
  cites = {0},
  citedby = {0},
  journal = {IEEE J. Emerg. Sel. Topics Circuits Syst.},
  volume = {1},
  number = {4},
  pages = {536-545},
}