Yield and Reliability Enhancement for VLSI Design - researchr publication authors

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Chung-Han Chen, Saritha Akavaram, Hira N. Narang, Fan Wu. Yield and Reliability Enhancement for VLSI Design. In Hamid R. Arabnia, Ashu M. G. Solo, editors, Proceedings of the 2009 International Conference on Computer Design, CDES 2009, July 13-16, 2009, Las Vegas Nevada, USA. pages 48-51, CSREA Press, 2009.

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