Li-Jhan Chen, Hsiang-Yun Cheng, Po-Han Wang, Chia-Lin Yang. Improving GPGPU Performance via Cache Locality Aware Thread Block Scheduling. Computer Architecture Letters, 16(2):127-131, 2017. [doi]
@article{ChenCWY17,
title = {Improving GPGPU Performance via Cache Locality Aware Thread Block Scheduling},
author = {Li-Jhan Chen and Hsiang-Yun Cheng and Po-Han Wang and Chia-Lin Yang},
year = {2017},
doi = {10.1109/LCA.2017.2693371},
url = {http://doi.ieeecomputersociety.org/10.1109/LCA.2017.2693371},
researchr = {https://researchr.org/publication/ChenCWY17},
cites = {0},
citedby = {0},
journal = {Computer Architecture Letters},
volume = {16},
number = {2},
pages = {127-131},
}