Ying-Liang Chen, Terng-Yin Hsu. Cost-efficiency FFT using hardware-reduction and dynamic current scaling approaches. In 2014 International Symposium on Integrated Circuits (ISIC), Singapore, December 10-12, 2014. pages 184-187, IEEE, 2014. [doi]
@inproceedings{ChenH14-45,
title = {Cost-efficiency FFT using hardware-reduction and dynamic current scaling approaches},
author = {Ying-Liang Chen and Terng-Yin Hsu},
year = {2014},
doi = {10.1109/ISICIR.2014.7029577},
url = {http://dx.doi.org/10.1109/ISICIR.2014.7029577},
researchr = {https://researchr.org/publication/ChenH14-45},
cites = {0},
citedby = {0},
pages = {184-187},
booktitle = {2014 International Symposium on Integrated Circuits (ISIC), Singapore, December 10-12, 2014},
publisher = {IEEE},
isbn = {978-1-4799-4833-8},
}