Experiments and optimizations for TVM on RISC-V Architectures with P Extension

Yi-Ru Chen, Hui-Hsin Liao, Chia-Hsuan Chang, Che-Chia Lin, Chao-Lin Lee, Yuan-Ming Chang, Chun-Chieh Yang, Jenq Kuen Lee. Experiments and optimizations for TVM on RISC-V Architectures with P Extension. In 2020 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2020, Hsinchu, Taiwan, August 10-13, 2020. pages 1-4, IEEE, 2020. [doi]

@inproceedings{ChenLCLLCYL20,
  title = {Experiments and optimizations for TVM on RISC-V Architectures with P Extension},
  author = {Yi-Ru Chen and Hui-Hsin Liao and Chia-Hsuan Chang and Che-Chia Lin and Chao-Lin Lee and Yuan-Ming Chang and Chun-Chieh Yang and Jenq Kuen Lee},
  year = {2020},
  doi = {10.1109/VLSI-DAT49148.2020.9196477},
  url = {https://doi.org/10.1109/VLSI-DAT49148.2020.9196477},
  researchr = {https://researchr.org/publication/ChenLCLLCYL20},
  cites = {0},
  citedby = {0},
  pages = {1-4},
  booktitle = {2020 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2020, Hsinchu, Taiwan, August 10-13, 2020},
  publisher = {IEEE},
  isbn = {978-1-7281-6083-2},
}