Leveraging Hardware Transactional Memory for Cache Side-Channel Defenses - researchr publication authors

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Sanchuan Chen, Fangfei Liu, Zeyu Mi, Yinqian Zhang, Ruby B. Lee, Haibo Chen, Xiaofeng Wang. Leveraging Hardware Transactional Memory for Cache Side-Channel Defenses. In Jong Kim 0001, Gail-Joon Ahn, Seungjoo Kim, Yongdae Kim, Javier López 0001, Taesoo Kim, editors, Proceedings of the 2018 on Asia Conference on Computer and Communications Security, AsiaCCS 2018, Incheon, Republic of Korea, June 04-08, 2018. pages 601-608, ACM, 2018. [doi]

This author has not been identified. Look up 'Sanchuan Chen' in GoogleThis author has not been identified. Look up 'Fangfei Liu' in GoogleThis author has not been identified. Look up 'Zeyu Mi' in GoogleThis author has not been identified. Look up 'Yinqian Zhang' in GoogleThis author has not been identified. Look up 'Ruby B. Lee' in GoogleThis author has not been identified. Look up 'Haibo Chen' in GoogleThis author has not been identified. It may be one of the following persons:

Xiaofeng Wang

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