Tse-Wei Chen, Chih-Hao Sun, Hsiao-Hang Su, Shao-Yi Chien, Daisuke Deguchi, Ichiro Ide, Hiroshi Murase. Power-Efficient Hardware Architecture of K-Means Clustering With Bayesian-Information-Criterion Processor for Multimedia Processing Applications. IEEE J. Emerg. Sel. Topics Circuits Syst., 1(3):357-368, 2011. [doi]
@article{ChenSSCDIM11,
title = {Power-Efficient Hardware Architecture of K-Means Clustering With Bayesian-Information-Criterion Processor for Multimedia Processing Applications},
author = {Tse-Wei Chen and Chih-Hao Sun and Hsiao-Hang Su and Shao-Yi Chien and Daisuke Deguchi and Ichiro Ide and Hiroshi Murase},
year = {2011},
doi = {10.1109/JETCAS.2011.2165231},
url = {http://dx.doi.org/10.1109/JETCAS.2011.2165231},
researchr = {https://researchr.org/publication/ChenSSCDIM11},
cites = {0},
citedby = {0},
journal = {IEEE J. Emerg. Sel. Topics Circuits Syst.},
volume = {1},
number = {3},
pages = {357-368},
}