Shuangching Chen, Shugang Wei. Weighted-to-residue and residue-to-weighted converters with three-moduli (2:::n:::-1, 2:::n:::, 2:::n:::+1) signed-digit architectures. In International Symposium on Circuits and Systems (ISCAS 2006), 21-24 May 2006, Island of Kos, Greece. IEEE, 2006. [doi]
@inproceedings{ChenW06:1,
title = {Weighted-to-residue and residue-to-weighted converters with three-moduli (2:::n:::-1, 2:::n:::, 2:::n:::+1) signed-digit architectures},
author = {Shuangching Chen and Shugang Wei},
year = {2006},
doi = {10.1109/ISCAS.2006.1693347},
url = {http://dx.doi.org/10.1109/ISCAS.2006.1693347},
tags = {architecture},
researchr = {https://researchr.org/publication/ChenW06%3A1},
cites = {0},
citedby = {0},
booktitle = {International Symposium on Circuits and Systems (ISCAS 2006), 21-24 May 2006, Island of Kos, Greece},
publisher = {IEEE},
}