A power-effective scan architecture using scan flip-flops clustering and post-generation filling - researchr publication authors

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Zhen Chen, Dong Xiang, Boxue Yin. A power-effective scan architecture using scan flip-flops clustering and post-generation filling. In Fabrizio Lombardi, Sanjukta Bhanja, Yehia Massoud, R. Iris Bahar, editors, Proceedings of the 19th ACM Great Lakes Symposium on VLSI 2009, Boston Area, MA, USA, May 10-12 2009. pages 517-522, ACM, 2009. [doi]

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