Analysis and Design of Reconfigurable Sense Amplifier for Compute SRAM With High-Speed Compute and Normal Read Access

Jian Chen, Wenfeng Zhao, Yuqi Wang, Yajun Ha. Analysis and Design of Reconfigurable Sense Amplifier for Compute SRAM With High-Speed Compute and Normal Read Access. IEEE Trans. Circuits Syst. II Express Briefs, 68(12):3503-3507, 2021. [doi]

@article{ChenZWH21-2,
  title = {Analysis and Design of Reconfigurable Sense Amplifier for Compute SRAM With High-Speed Compute and Normal Read Access},
  author = {Jian Chen and Wenfeng Zhao and Yuqi Wang and Yajun Ha},
  year = {2021},
  doi = {10.1109/TCSII.2021.3123512},
  url = {https://doi.org/10.1109/TCSII.2021.3123512},
  researchr = {https://researchr.org/publication/ChenZWH21-2},
  cites = {0},
  citedby = {0},
  journal = {IEEE Trans. Circuits Syst. II Express Briefs},
  volume = {68},
  number = {12},
  pages = {3503-3507},
}