DAGSizer: A Directed Graph Convolutional Network Approach to Discrete Gate Sizing of VLSI Graphs

Chung-Kuan Cheng, Chester Holtz, Andrew B. Kahng, Bill Lin 0001, Uday Mallappa. DAGSizer: A Directed Graph Convolutional Network Approach to Discrete Gate Sizing of VLSI Graphs. ACM Trans. Design Autom. Electr. Syst., 28(4), July 2023. [doi]

@article{ChengHKLM23,
  title = {DAGSizer: A Directed Graph Convolutional Network Approach to Discrete Gate Sizing of VLSI Graphs},
  author = {Chung-Kuan Cheng and Chester Holtz and Andrew B. Kahng and Bill Lin 0001 and Uday Mallappa},
  year = {2023},
  month = {July},
  doi = {10.1145/3577019},
  url = {https://doi.org/10.1145/3577019},
  researchr = {https://researchr.org/publication/ChengHKLM23},
  cites = {0},
  citedby = {0},
  journal = {ACM Trans. Design Autom. Electr. Syst.},
  volume = {28},
  number = {4},
}