Parallel embedded processor architecture for FPGA-based image processing using parallel software skeletons

Hanen Chenini, Jean-Pierre Dérutin, Romuald Aufrère, Roland Chapuis. Parallel embedded processor architecture for FPGA-based image processing using parallel software skeletons. EURASIP J. Adv. Sig. Proc., 2013:153, 2013. [doi]

Authors

Hanen Chenini

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Jean-Pierre Dérutin

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Romuald Aufrère

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Roland Chapuis

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