2/Bit Nonlinear Sub-Teraohm 0TNR Vertical ReRAM

Tsai-Kan Chien, Lih-Yih Chiou, Chi-Shian Chang, Jing-Yu Huang, Chung-Han Wu, Heng-Yuan Lee, Shyh-Shyuan Sheu. 2/Bit Nonlinear Sub-Teraohm 0TNR Vertical ReRAM. IEEE Trans. on Circuits and Systems, 65-II(9):1234-1238, 2018. [doi]

@article{ChienCCHWLS18,
  title = {2/Bit Nonlinear Sub-Teraohm 0TNR Vertical ReRAM},
  author = {Tsai-Kan Chien and Lih-Yih Chiou and Chi-Shian Chang and Jing-Yu Huang and Chung-Han Wu and Heng-Yuan Lee and Shyh-Shyuan Sheu},
  year = {2018},
  doi = {10.1109/TCSII.2017.2778246},
  url = {https://doi.org/10.1109/TCSII.2017.2778246},
  researchr = {https://researchr.org/publication/ChienCCHWLS18},
  cites = {0},
  citedby = {0},
  journal = {IEEE Trans. on Circuits and Systems},
  volume = {65-II},
  number = {9},
  pages = {1234-1238},
}