A 4-GHz Ring-Oscillator-Based Digital Sub-Sampling PLL With Energy-Efficient Dual-Domain Phase Detector

Yoonjae Choi, Hyunsu Park, Jonghyuck Choi, Jincheol Sim, Youngwook Kwon, Seungwoo Park, Changmin Sim, Chulwoo Kim. A 4-GHz Ring-Oscillator-Based Digital Sub-Sampling PLL With Energy-Efficient Dual-Domain Phase Detector. IEEE Trans. Circuits Syst. I Regul. Pap., 70(7):2734-2743, July 2023. [doi]

@article{ChoiPCSKPSK23,
  title = {A 4-GHz Ring-Oscillator-Based Digital Sub-Sampling PLL With Energy-Efficient Dual-Domain Phase Detector},
  author = {Yoonjae Choi and Hyunsu Park and Jonghyuck Choi and Jincheol Sim and Youngwook Kwon and Seungwoo Park and Changmin Sim and Chulwoo Kim},
  year = {2023},
  month = {July},
  doi = {10.1109/TCSI.2023.3272626},
  url = {https://doi.org/10.1109/TCSI.2023.3272626},
  researchr = {https://researchr.org/publication/ChoiPCSKPSK23},
  cites = {0},
  citedby = {0},
  journal = {IEEE Trans. Circuits Syst. I Regul. Pap.},
  volume = {70},
  number = {7},
  pages = {2734-2743},
}