A full-rate 40 Gb/s clock and data recovery with resonator-based frequency-doubling mechanism in 0.13-μm CMOS

Joseph Chong, Dong Sam Ha. A full-rate 40 Gb/s clock and data recovery with resonator-based frequency-doubling mechanism in 0.13-μm CMOS. In IEEE 60th International Midwest Symposium on Circuits and Systems, MWSCAS 2017, Boston, MA, USA, August 6-9, 2017. pages 1438-1441, IEEE, 2017. [doi]

Authors

Joseph Chong

This author has not been identified. Look up 'Joseph Chong' in Google

Dong Sam Ha

This author has not been identified. Look up 'Dong Sam Ha' in Google