A compact VLSI design for recursive neural networks with hardware annealing capability - researchr publication authors

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Eric Y. Chou, Bing J. Sheu, Steve H. Jen. A compact VLSI design for recursive neural networks with hardware annealing capability. In Proceedings of International Conference on Neural Networks (ICNN'95), Perth, WA, Australia, November 27 - December 1, 1995. pages 1650-1655, IEEE, 1995. [doi]

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