CASCADE: Connecting RRAMs to Extend Analog Dataflow In An End-To-End In-Memory Processing Paradigm

Teyuh Chou, Wei Tang, Jacob Botimer, Zhengya Zhang. CASCADE: Connecting RRAMs to Extend Analog Dataflow In An End-To-End In-Memory Processing Paradigm. In Proceedings of the 52nd Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 2019, Columbus, OH, USA, October 12-16, 2019. pages 114-125, ACM, 2019. [doi]

@inproceedings{ChouTBZ19,
  title = {CASCADE: Connecting RRAMs to Extend Analog Dataflow In An End-To-End In-Memory Processing Paradigm},
  author = {Teyuh Chou and Wei Tang and Jacob Botimer and Zhengya Zhang},
  year = {2019},
  doi = {10.1145/3352460.3358328},
  url = {https://doi.org/10.1145/3352460.3358328},
  researchr = {https://researchr.org/publication/ChouTBZ19},
  cites = {0},
  citedby = {0},
  pages = {114-125},
  booktitle = {Proceedings of the 52nd Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 2019, Columbus, OH, USA, October 12-16, 2019},
  publisher = {ACM},
  isbn = {978-1-4503-6938-1},
}