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High performance FPGA-based implementation of a parallel multiplier-accumulator

Marek Cieplucha. High performance FPGA-based implementation of a parallel multiplier-accumulator. In Proceedings of the 20th International Conference Mixed Design of Integrated Circuits and Systems - MIXDES 2013, Gdynia, Poland, June 20-22, 2013. pages 485-489, IEEE, 2013. [doi]

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Marek Cieplucha

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