David Clarino, Shohei Kuroda, Shigeru Yamashita. Using S Gates and Relative Phase Toffoli Gates to Improve T-Count in Quantum Boolean Circuits. In 53rd IEEE International Symposium on Multiple-Valued Logic, ISMVL 2023, Matsue, Japan, May 22-24, 2023. pages 147-152, IEEE, 2023. [doi]
@inproceedings{ClarinoKY23,
title = {Using S Gates and Relative Phase Toffoli Gates to Improve T-Count in Quantum Boolean Circuits},
author = {David Clarino and Shohei Kuroda and Shigeru Yamashita},
year = {2023},
doi = {10.1109/ISMVL57333.2023.00037},
url = {https://doi.org/10.1109/ISMVL57333.2023.00037},
researchr = {https://researchr.org/publication/ClarinoKY23},
cites = {0},
citedby = {0},
pages = {147-152},
booktitle = {53rd IEEE International Symposium on Multiple-Valued Logic, ISMVL 2023, Matsue, Japan, May 22-24, 2023},
publisher = {IEEE},
isbn = {978-1-6654-6416-1},
}