Automated Hardware and Neural Network Architecture co-design of FPGA accelerators using multi-objective Neural Architecture Search

Philip Colangelo, Oren Segal, Alexander Speicher, Martin Margala. Automated Hardware and Neural Network Architecture co-design of FPGA accelerators using multi-objective Neural Architecture Search. In 10th IEEE International Conference on Consumer Electronics, ICCE-Berlin 2020, Berlin, Germany, November 9-11, 2020. pages 1-6, IEEE, 2020. [doi]

@inproceedings{ColangeloSSM20,
  title = {Automated Hardware and Neural Network Architecture co-design of FPGA accelerators using multi-objective Neural Architecture Search},
  author = {Philip Colangelo and Oren Segal and Alexander Speicher and Martin Margala},
  year = {2020},
  doi = {10.1109/ICCE-Berlin50680.2020.9352153},
  url = {https://doi.org/10.1109/ICCE-Berlin50680.2020.9352153},
  researchr = {https://researchr.org/publication/ColangeloSSM20},
  cites = {0},
  citedby = {0},
  pages = {1-6},
  booktitle = {10th IEEE International Conference on Consumer Electronics, ICCE-Berlin 2020, Berlin, Germany, November 9-11, 2020},
  publisher = {IEEE},
  isbn = {978-1-7281-5885-3},
}