Do Not Trust, Verify: A Verifiable Hardware Accelerator for Matrix Multiplication

Maria I. Mera Collantes, Siddharth Garg. Do Not Trust, Verify: A Verifiable Hardware Accelerator for Matrix Multiplication. Embedded Systems Letters, 12(3):70-73, 2020. [doi]

@article{CollantesG20,
  title = {Do Not Trust, Verify: A Verifiable Hardware Accelerator for Matrix Multiplication},
  author = {Maria I. Mera Collantes and Siddharth Garg},
  year = {2020},
  doi = {10.1109/LES.2019.2953485},
  url = {https://doi.org/10.1109/LES.2019.2953485},
  researchr = {https://researchr.org/publication/CollantesG20},
  cites = {0},
  citedby = {0},
  journal = {Embedded Systems Letters},
  volume = {12},
  number = {3},
  pages = {70-73},
}