Reducing the number of transistors with gate clustering

Calebe Conceicao, Gracieli Posser, Ricardo Reis. Reducing the number of transistors with gate clustering. In IEEE 7th Latin American Symposium on Circuits & Systems, LASCAS 2016, Florianopolis, Brazil, February 28 - March 2, 2016. pages 163-166, IEEE, 2016. [doi]

@inproceedings{ConceicaoPR16,
  title = {Reducing the number of transistors with gate clustering},
  author = {Calebe Conceicao and Gracieli Posser and Ricardo Reis},
  year = {2016},
  doi = {10.1109/LASCAS.2016.7451035},
  url = {http://dx.doi.org/10.1109/LASCAS.2016.7451035},
  researchr = {https://researchr.org/publication/ConceicaoPR16},
  cites = {0},
  citedby = {0},
  pages = {163-166},
  booktitle = {IEEE 7th Latin American Symposium on Circuits & Systems, LASCAS 2016, Florianopolis, Brazil, February 28 - March 2, 2016},
  publisher = {IEEE},
  isbn = {978-1-4673-7835-2},
}