2.4 A 2-to-16GHz BiCMOS ΔΣ fractional-N PLL synthesizer with integrated VCOs and frequency doubler for wireless backhaul applications

Tino Copani, Claudio Asero, Matteo Colombo, Paolo Aliberti, Giuseppe Martino, Francesco Clerici. 2.4 A 2-to-16GHz BiCMOS ΔΣ fractional-N PLL synthesizer with integrated VCOs and frequency doubler for wireless backhaul applications. In 2016 IEEE International Solid-State Circuits Conference, ISSCC 2016, San Francisco, CA, USA, January 31 - February 4, 2016. pages 42-43, IEEE, 2016. [doi]

Authors

Tino Copani

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Claudio Asero

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Matteo Colombo

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Paolo Aliberti

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Giuseppe Martino

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Francesco Clerici

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