AES Hardware Implementation Based on FPGA with Improved Throughput

Andreea Cristina Suiu Cristea, Alexandra Balan. AES Hardware Implementation Based on FPGA with Improved Throughput. In Michael E. Auer, Samir Abou El-Seoud, Omar H. Karam, editors, Artificial Intelligence and Online Engineering - Proceedings of the 19th International Conference on Remote Engineering and Virtual Instrumentation, British University, Cairo, Egypt, 28 February - 2 March 2022. Volume 524 of Lecture Notes in Networks and Systems, pages 41-50, Springer, 2022. [doi]

@inproceedings{CristeaB22,
  title = {AES Hardware Implementation Based on FPGA with Improved Throughput},
  author = {Andreea Cristina Suiu Cristea and Alexandra Balan},
  year = {2022},
  doi = {10.1007/978-3-031-17091-1_5},
  url = {https://doi.org/10.1007/978-3-031-17091-1_5},
  researchr = {https://researchr.org/publication/CristeaB22},
  cites = {0},
  citedby = {0},
  pages = {41-50},
  booktitle = {Artificial Intelligence and Online Engineering - Proceedings of the 19th International Conference on Remote Engineering and Virtual Instrumentation, British University, Cairo, Egypt, 28 February - 2 March 2022},
  editor = {Michael E. Auer and Samir Abou El-Seoud and Omar H. Karam},
  volume = {524},
  series = {Lecture Notes in Networks and Systems},
  publisher = {Springer},
  isbn = {978-3-031-17091-1},
}