Ground Temporal Logic: A Logic for Hardware Verification - researchr publication authors

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David Cyrluk, Paliath Narendran. Ground Temporal Logic: A Logic for Hardware Verification. In David L. Dill, editor, Computer Aided Verification, 6th International Conference, CAV 94, Stanford, California, USA, June 21-23, 1994, Proceedings. Volume 818 of Lecture Notes in Computer Science, pages 247-259, Springer, 1994.

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