A Parallel-Serial Decimal Multiplier Architecture

Luigi Dadda, M. Pisoni, Marco D. Santambrogio. A Parallel-Serial Decimal Multiplier Architecture. In IEEE 15th International Conference on Computational Science and Engineering, CSE 2012, Paphos, Cyprus, December 5-7, 2012. pages 310-317, IEEE Computer Society, 2012. [doi]

Authors

Luigi Dadda

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M. Pisoni

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Marco D. Santambrogio

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