Scheduling Register-Allocated Codes in User-Guided High-Level Synthesis

Alain Darte, C. Quinson. Scheduling Register-Allocated Codes in User-Guided High-Level Synthesis. In IEEE International Conference on Application-Specific Systems, Architectures and Processors, ASAP 2007, Montréal, Québec, Canada, July 8-11, 2007. pages 140-147, IEEE Computer Society, 2007. [doi]

@inproceedings{DarteQ07,
  title = {Scheduling Register-Allocated Codes in User-Guided High-Level Synthesis},
  author = {Alain Darte and C. Quinson},
  year = {2007},
  doi = {10.1109/ASAP.2007.4429971},
  url = {http://dx.doi.org/10.1109/ASAP.2007.4429971},
  tags = {C++},
  researchr = {https://researchr.org/publication/DarteQ07},
  cites = {0},
  citedby = {0},
  pages = {140-147},
  booktitle = {IEEE International Conference on Application-Specific Systems, Architectures and Processors, ASAP 2007, Montréal, Québec, Canada, July 8-11, 2007},
  publisher = {IEEE Computer Society},
}