Timing Verification of UML Activity Diagram Based Code Block Level Models for Real Time Multiprocessor System-on-Chip Applications

Dipankar Das, Rajeev Kumar, P. P. Chakrabarti. Timing Verification of UML Activity Diagram Based Code Block Level Models for Real Time Multiprocessor System-on-Chip Applications. In 13th Asia-Pacific Software Engineering Conference (APSEC 2006), 6-8 December 2006, Bangalore, India. pages 199-208, IEEE Computer Society, 2006. [doi]

Authors

Dipankar Das

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Rajeev Kumar

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P. P. Chakrabarti

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