On the Mitigation of Cache Hostile Memory Access Patterns on Many-Core CPU Architectures

Tom Deakin, Wayne P. Gaudin, Simon McIntosh-Smith. On the Mitigation of Cache Hostile Memory Access Patterns on Many-Core CPU Architectures. In Julian M. Kunkel, Rio Yokota, Michela Taufer, John Shalf, editors, High Performance Computing - ISC High Performance 2017 International Workshops, DRBSD, ExaComm, HCPM, HPC-IODC, IWOPH, IXPUG, P^3MA, VHPC, Visualization at Scale, WOPSSS, Frankfurt, Germany, June 18-22, 2017, Revised Selected Papers. Volume 10524 of Lecture Notes in Computer Science, pages 348-362, Springer, 2017. [doi]

@inproceedings{DeakinGM17,
  title = {On the Mitigation of Cache Hostile Memory Access Patterns on Many-Core CPU Architectures},
  author = {Tom Deakin and Wayne P. Gaudin and Simon McIntosh-Smith},
  year = {2017},
  doi = {10.1007/978-3-319-67630-2_26},
  url = {https://doi.org/10.1007/978-3-319-67630-2_26},
  researchr = {https://researchr.org/publication/DeakinGM17},
  cites = {0},
  citedby = {0},
  pages = {348-362},
  booktitle = {High Performance Computing - ISC High Performance 2017 International Workshops, DRBSD, ExaComm, HCPM, HPC-IODC, IWOPH, IXPUG, P^3MA, VHPC, Visualization at Scale, WOPSSS, Frankfurt, Germany, June 18-22, 2017, Revised Selected Papers},
  editor = {Julian M. Kunkel and Rio Yokota and Michela Taufer and John Shalf},
  volume = {10524},
  series = {Lecture Notes in Computer Science},
  publisher = {Springer},
  isbn = {978-3-319-67630-2},
}